Frontiers in Computational Nanoelectronics
Hosted by the Network for Computational Nanotechnology (NCN)
Organized by:
SRC, MARCO, and NRI
MSD and FENA Focus Centers
WIN, INDEX, and SWAN
This small, informal workshop is designed to:
- Promote communication and identify opportunities for collaboration between SRC, MARCO, and NRI-funded university researchers working on theory, modeling, and simulation of ultimate CMOS, CMOS plus, and beyond CMOS devices.
- Identify key challenges in modeling and simulation for the SRC, MARCO, and NRI programs and to identify promising solutions.
Where & When
Date: February 20-21, 2007
Location: University Place Conference Center and Hotel
IUPUI, Indianapolis, IN
- Provide experimental collaborators and industrial partners with a bird's eye view of the current status of university research.
- Provide a forum to communicate industry/sponsor needs to university researchers and to identify mechanisms to promote industry-university collaboration.
- Encourage the use of NCN software/middleware and collaboration technology.
Who should attend:
- SRC, MSD, FENA, WIN, INDEX, SWAN faculty engaged in theory, modeling, and simulation of advanced electronic devices.
- Other PI's and industrial partners of these centers interested in a broad overview of what's happening nationwide in theory, modeling and simulation.